FPGA-Rx Family

Scalable FPGA-prototyping boards for continuous data streams.

High-capacity development environments for laboratory and field

The FPGA-Boards of the Rx-family are prototyping boards developed to be used for digital preprocessing of fast and parallel data streams up to 40 bit. The developement based on three main criterions:

1. Standalone board to be used both for testing and as an add-on block
2. Easy configuration of the FPGA
3. Cascadability of several boards and "plug'n play"
 
All development work has been carried out at the Fraunhofer IIS, so that the whole knowledge is available from one source.

Range of use

The FPGA-Boards R2 and R4 are used in large industry and research projects in the area of communication since 2002:

• Software-radio for wireless communication
• Digital-receiver in combination with smart antennas
• Digital receiver for accurate distance measurement
• Sensor sampling with real-time processing for toolmaking
• Monitoring and controlling of high-frequency circuits

Bei weiteren Fragen zu den Applikationen nutzen Sie bitte unser Kontaktformular.

 

Board R2

The R2 board is a FPGA-prototyping-board developed to be used for digital preprocessing of fast and parallel data-streams.

Highlights	Standalone board to be used both for testing as well as add-on block Easy configuration of its FPGAs via JTAG or CardFlash Cascadability with other boards of R-Series Circuit diagram, layout and FPGA configuration from one source Wide range of accessories
Features	National-Instruments 6533DIO-32HS-card compatible SCSI interface 985,882 Gates Xilinx Virtex-XCV600E™ FPGA CF card drive Serial interface JTAG interface Logic analyzerport Freely usable LEDs and IP-switches
Details Xilinx Virtex-XCV600E Platform FPGA	Gates 985,882 CLB matrix 48 x 72 Logic gates 186,624 Distributed RAM up to 221,184 Bits SelectRam blocks 4096 x 72 Bits More information: Virtex&Virtex-E product tables
Configuration	Plug and Play / Hotplug IEEE Std 1149.1 boundary-scan (JTAG) support
Interfaces	2 x SCSI, each 40 pins TTL Semi-RS232 interface (driverless)
Peripherals	24 I/O lines LED 2 x 7 + 3 Configuration LED 3 Reset button (RST)
Powersupply	Internally stabilized power supply 3.3 Volt und 1.8 Volt Input voltage range 5 - 10 Volt

 

Board R4

Das Board R4 verfügt neben allen Merkmalen des Boards R2 über zwei FPGAs und weitere Schnittstellen.

Highlights	Mit 3.138.356 Gatter mehr als doppelt soviel Leistung wie unser FPGA-Board R2 Standalone Board für den Einsatz sowohl in Testaufbauten als auch im Feld  Einfache Konfiguration des FPGAs  Skalierbarkeit von mehreren Boards  Schaltplan, Layout und FPGA-Konfiguration aus einer Hand  Umfangreiches Zubehör
Merkmale	2 x 1.569.178 Gatter Xilinx Virtex-XCV1000E™ FPGA / alternative Bestückung möglich CF-Card-Laufwerk  2 x serielle Schnittstelle, parallele Schnittstelle National-Instruments 6533DIO-32HS-Karten kompatible SCSI Schnittstelle Takt Oszillator On-Board Batterie zum Datenerhalt Logic-Analyzer-Port Frei benutzbare Leuchtdioden und Taster On-Board Speicher (4 MB SRAM, 2 MB Flash)
2 x Xilinx Virtex-XCV1000E Platform FPGA	Gatter 1.569.178 CLB Matrix 64 x 96 Logic Gates 331.776 Distributed RAM bis zu 393.216 Bits Anzahl SelectRam Blöcke 4096 x 96 Bits Eine alternative Bestückung ist möglich. Weitere Informationen unter Virtex&Virtex-E Product Tables.
Speicher Datenbusbreite 32 Bit	2 x WED2DL32512V SRAM Organisation 512 K x 32 Kapazität 2 x 2 Mbyte 2 x Intel 28F128J3A StrataFlash Memory Organisation 8 M x 16 Kapazität 2 x 16 Mbyte 4 x HM62W8511H SRAM Organisation 512 K x 8 Kapazität 4 x 0,5 Mbyte Atmel Serial EEPROM AT25040 Organisation 512 K x 8 Kapazität 4 K
Konfiguration	Plug and Play/Hotplug durch Flash Card IEEE Std. 1149.1 boundary-scan (JTAG)-Unterstützung
Systemüberwachung	Dallas DS1302 Trickle Charge Timekeeping Chip (RTC) Maxim Max6708 Watchdog Timer
Taktversorgung	Intern über Quarz-Oszillator Extern über SMA-Buchse
Schnittstellen	2 x National DIO SCSI je 40 Pole TTL 2 x Serielle Schnittstelle RS 232 Parallele Schnittstelle
Peripherie	24 I/O über Pfostenstecker 3 x Konfiguration LEDs Neukonfigurations-Taster (RST)
Spannungsversorgung	Interne stab. Spannungsversorgung 3,3 Volt und 1,8 Volt Eingangsspannung 5 bis 10 Volt

 

FPGA-UFB Family

The FPGA-Board UFB and UFBx were developed to link industry applications requiring high data throughput with a PC via Firewire.

Features

• One ore more FPGAs with different complexity possible
• Expandable by modules or boards via a universal interface
• Integration of user specific interfaces possible
• Fast, standardized IEEE1394 Firewire interface (400 Mbps) to PC
• A manifold of monitoring and diagnosis possibilities of the platform by the PC
• Stand-alone operation possible

Range of use

• Evaluation platform for ASIC development
• Real-time verification of VHDL code
• Complex signal processing with fast data transfer and / or fast data interface to the PC (e.g. digital radio receiver)
• Arbitrarily expandabel by project specific modules (e.g. DSP, ADC, DAC)

In close cooperation with Telefunken  the Fraunhofer IIS staff developed a broadcast system to digitize the AM bands according to the DRM standard. Radio transmitter and receiver is the FPGA-Board UFB.
In the RELY project (www.rely-europe.com), the FPGA-Board UFBx is used as a hybrid radio receiver prototype for terrestrial and satellite reception.

 

Board UFBx

The FPGA-prototyping board UFBx comes with all features of the UFB board and is largely all-purpose due to individual designed modules.

Highlights

• 2 x Firewire IEEE1394 connection to a PC
• Mainboard with module interface
• Stand alone operation without PC possible
• Easy configuration of the FPGAs by Flash memory on the mainboard
• Circuit diagram, layout and FPGA configuration from one source

Features

• Different modules can be combined
• Xilinx Virtex-II XC2V4000 / 6000/ 8000 FPGA (FPGA module)
• Connectors for own modules
• Microcontroller
• Serial interface
• OCDS and JTAG interface
• Connector for external system clock
• Internal system clock for uController and FPGAs
• On-board memory (SRAM, Flash)
• Flexible power supply

Details

FPGA-module Xilinx Virtex-II XC2V4000 platform FPGA

• Logic Cells 51,840
• BRAM (Kbits) 2,160
• 18x18 Multipliers 120
• Digital Clock Management Blocks 12
• Max Dist. RAM 720 Kb
• Max Available User I/O 912

alternativ:

• Xilinx Virtex-II XC2V6000 Platform FPGA,
• Xilinx Virtex-II XC2V8000 Platform FPGA,

More information: Virtex-II Platform FPGA

Microcontroller

• Flash AM29LV065DU90 - 64 Mbit (8 M x 8)
• SRAM HM62V16256CLTT-5 - 4 Mbit (256 K x 16)

FPGA

• SRAM TC558512J - 4 Mbit (524 K x 8)

Configuration

• Boundary-Scan über JTAG-Schnittstelle (X502)
• OCDS (Debugging für Microcontroller)

Data transfer

• Two isochronous channels in either direction (from FPGA to PC and vice versa) with a continuous speed of up to 128 Mbps each.

Supply unit clock pulse

• Internal by quartz oscillator
• External by SMA-connector (50Ohm)

Mainboard - module interface

• 2x300 pin interface
• Access to SRAM memory (512kx8) on the mainboard
• General Purpose I/O (GPIO) lines
• Clock lines to the dedicated clock pins of the FPGAs
• 2 fast, parallel interfaces to Firewire Link Layer Controller (each 8 bit, max. 24 MHz)
• Signal lines for booting a couple of FPGAs
• Connection to application interface (s.b.)

Mainboard - application interface

• Application interface with 200 pins via standard 2.54 mm female connector
• Clock lines to the dedicated clock pins of the FPGAs
• Conntection toGeneral Purpose I/O (GPIO) pins of the FPGAs
• Power lines

FPGA module

• Module interface to mainboard
• Module interface to adjacent module
• Expansion port, 50 pins with clock and data lines

Power supply

• Via IEEE1394a (8-32V) or external via X100, X101 (8-20V)

 

Accessories

The following supplies are available for all FPGA prototyping boards:

AD board

Highlights

• High speed 80 MHz 15 Bit A/D-converter (AD6645)
• Easy Plug-and-Play connection to other components
• D/A converter for controlling analog components

Features

• A/D converter AD6645
• 2 x (4 x DA) D/A converter LTC1458
• 8 digital programmable analog ports for control of analog actuators
• Several test point connector ports

Converter for agilent logic analyzer

• 2 x DIO SCSI route-through 40 bits
• 2 x ports for agilent logic analyzer including resistor arrays

IP Cores

• VHDL Toplevel
• UCF files
• LED control IP core
• FIR filter IP cores from redFIR (generate here)
• CorePool: save time and cost during development using intellectual property http://www.corepool.com

 

Support

FAQ

What about cascadability between R2 and R4-Boards?

Yes, the DIO SCSI-ports have the same seizure provided the electrical standard of both FPGA-boards has been configurated equal.

Kann man die Flash-Card während des Betriebs entfernen?

Yes, the FPGAs configuration remains as long as the supply voltage is impressed.
Please send your questions concerning the FPGA-prototypingen-boards to: ec-info@iis.fhg.de

• Documentation [ PDF 2.8MB ]