Mixed-Signal ASIC Design with ams Hitkit

Description

A three day intensive course on mixed-signal design methodology
based on semi-conductor technologies of the Austrian foundry ams

Course Objectives

The aim of this course is to enable designers of high performance integrated circuits:

  • to understand the design methodology for complex mixed-signal ICs
  • to gain insight into the design flow implemented in the ams hitkit 4.11 (H18)

Documentation provided on the course will greatly assist with the design of ICs.

The examples given are based on 0.18 micron High Voltage CMOS technology and Cadence 6.1.5 and all design steps can be practiced on workstations

  • Design flow for digital, analog and mixed-signal designs
  • Front-end design, layout generation, back-annotation and verification
  • Interface to test

Contents

Day 1 - Digital Design Flow

  • Introduction hitkit and Technologies
  • Functional Verilog Simulation, Synthesis
  • Timing Calculation & Gate Level Simulation
  • Digital Standard Cell Place & Route, Back-Annotation

Day 2 - Analog Design Flow

  • Spectre Simulation, Devices & Callback
  • Corner & Monte Carlo Simulation
  • Analog Layout Generation using LayoutXL
  • PCells, DRC, LVS, Parasitic Extraction
  • Post Layout Simulation, GDSII Conversion

Day 3 - Mixed-Signal Design Flow

  • Mixed-Signal Back-Annotation
  • Design Partitioning, Interface Elements, Back-Annotation

Course Participants

  • Industrial Design and Project Engineers who plan to design mixed-signal ASICs with our hitkit based on Cadence software
  • Analog Design Engineers who have already designed integrated circuits and want to use ams technologies
  • Digital Designers who need to integrate some analog functionality in their designs
  • Mixed-Signal Design Engineers.

    Basic knowledge of Cadence Virtuoso tools is mandatory!

Duration

Three days at Fraunhofer IIS, Am Wolfsmantel 33, 91058 Erlangen, Germany

Date

On request: virtual-asic@iis.fraunhofer.de

Course Language

English