Quadrupled data rate boosts transmission speed for image and audio information.
Camera resolution is constantly improving. Meanwhile, users expect hardware components to become smaller and smaller. This is particularly true of ultra HD cameras, which capture four times as many pixels as their full HD counterparts. Researchersat the Engineering of Adaptive Systems (EAS) division in Dresden have developed a compact and energy-saving solution to process the huge volumes of data this entails.
In the „Memory³“ project, funded by the German Federal Ministry of Economic Affairs and Energy under the Central Innovation Program for SMEs (ZIM), researchers have developed a chip with the capacity to quadruple system performance. The new chip reduces line width by placing processor and memory in the same housing. The flow of data between the two components is ensured by a superfine substrate, known as an interposer, which allows processor and memory to be positioned so closely together that data can be exchanged at a substantially faster rate, while consuming less energy. “Whereas the distance between the chips was originally measured in millimeters, we are now working on a scale well below one millimeter,” explains Andy Heinig, group manager for Advanced System Integration at the Dresden site. This 3D integrated structure significantly speeds up transmission of image and audio information, allowing a data rate of 400 GBit/s.
The Fraunhofer IIS experts spent around one and a half years on theoretical development before producing a prototype in February 2016. “We don’t expect this development to be the end of the line, by any means,” says Heinig, who believes that further improvements boosting performance by a factor of four or even more are entirely possible in the coming years.
The current 3D microchip structure was developed primarily with ultra HD cameras in mind. However, it could also find applications in other areas, such as graphics cards or switching nodes in fiber-optic networks.