Secure Elements and Accelerators

CC EAL4+ RISC-V secure element

The RISC-V secure element, based on OpenTitan, offers robust security features to safeguard hardware devices against attacks. It supports both classic and post-quantum cryptography, providing protection against current and future threats.

The element provides secure key storage, secure boot, secure update, and authentication to ensure devices are up-to-date and protected from unauthorized access. The secure element includes active monitoring for real-time threat detection and an authenticated debug interface for easy testing and troubleshooting.

Key Features

  • Hardened 32-Bit Ibex core (RV32IMCB)
  • Common Criteria EAL 4+ security level
  • (Post-quantum) secure bootstrap and update
  • Support of DICE (Device Identifier Composition Engine) and remote certification
  • Cryptographic key storage and API
  • Hardware accelerator for classic and post-quantum cryptography
  • Developed and tested to withdraw side-channel and fault attacks
  • Device identity and originality checks
  • RISC-V conform JTAG debug module
  • Digital wrapper for analog entropy source with FIPS and CC compatible status checks
  • Physical Unclonable Function (PUF) based key derivation
  • Alert handler for handling critical security events

More Information

Digital Accelerators
optionally based on RISC-V

Chip Design and Modular IP Service

Chip Design Services – according to your specific requirements!