Project »KI-FLEX«

The partners working on the research project “KI-FLEX” are developing a powerful, energy-efficient hardware platform and the associated software framework for autonomous driving. This “KI-FLEX” platform is being designed to process and merge data from laser, camera and radar sensors in cars quickly and reliably by using methods of artificial intelligence (AI; German abbreviation: KI). As a result, the vehicle always has an accurate picture of the actual traffic conditions, can locate its own position in this environment and, on the basis of this information, make the right decision in every driving situation – thus making autonomous driving safe and reliable.

Project partners:

• Fraunhofer Institute for Integrated Circuits IIS (lead of the consortium)
• Ibeo Automotive Systems GmbH
• Infineon Technologies AG
• videantis GmbH
• Technical University of Munich, Chair of Robotics, Artificial Intelligence and Real-time Systems
• Fraunhofer Institute for Open Communication Systems FOKUS
• Daimler Center for Automotive IT Innovations (DCAITI)
• Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Chair of Computer Science 3: Computer Architecture

• Flexible and highly efficient system-on-chip (SoC) platform for multisensory environment recognition in automotive applications
• Flexibly programmable, future-proof multi-core deep learning accelerator in the form of a chip (ASIC).
• Algorithms for sensor signal processing and sensor data fusion based on the use of neural networks (NNs)
• Novel positioning and calibration algorithms for information processing based on camera, lidar and radar sensors
• New scheduling concepts for dynamic resource planning in order to utilize the full potential of all system components at all times
• Methods and tools based on artificial intelligence to ensure the functional safety of the AI algorithms in the application and in the planned hardware-software system
• System adapts independently to different operating conditions through dynamic reconfiguration, for example if individual sensors fail or malfunction

• Development of a flexible DLI accelerator core for the multi-core deep learning accelerator
• Integration of different DLI accelerator cores into a flexible, future-proof ASIC
• Integration of the ASIC into the hardware platform

The architecture of the ASIC is designed so that future improvements to NN architectures, i.e., emerging NN types and concepts, can continue to be implemented. To this end, critical points are specifically designed to be reconfigurable in order to bridge the gap between the rigidity of an ASIC and the flexibility of an FPGA.