Novel energy efficient hardware accelerator developed for the Simplex Algorithm

Erlangen (Germany): At the Fraunhofer Institute for Integrated Circuits IIS, researchers at the departments Smart Sensing and Electronics and Supply Chain Services have successfully developed a novel hardware accelerator to reduce the effort of the computationally expensive pricing step in the Simplex Algorithm. This innovative technological breakthrough was presented at the International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2025) conference in Japan in May 2025.

The Simplex Algorithm is a widely known mathematical procedure, which is well suited for all types of linear optimization problems. It iteratively approaches an optimal solution to a linear optimization problem. In times of fast-growing technology infrastructure, larger optimization problems are going to be faced and meanwhile the need to save energy increases - challenges that affect industry and research alike. Fraunhofer IIS’ novel accelerator hence targets a highly relevant topic, offering a significant improvement over existing software-based solvers by enabling faster and more energy-efficient solutions through hardware-level optimization tailored specifically to the Simplex Algorithm.

The work was possible by bridging the gap between research on hardware development and mathematical optimization. These disciplines were mainly represented by Dr.-Ing. Marcus Bednara and Kristin Braun, respectively. “My doctoral advisor Professor Alexander Martin, Director of Fraunhofer IIS, initiated the idea behind this collaboration. Thereby, this necessary preliminary work for researching a practical accelerator was funded by Fraunhofer IIS itself.”, Kristin Braun, research assistant, explains. The accelerator uses an optimized architecture that is well suited for the Simplex Algorithm. This will help to reduce energy consumption of optimization for edge applications such as robot control, production planning, or routing, and many more problems arising in supply chain applications. This development has been achieved by developing Fraunhofer IIS’ own hardware method that is tailored for linear optimization using the Simplex Algorithm. The results of this project were published at the International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2025) conference held in Japan in May of 2025.

“Application-specific accelerators for embedded systems have many advantages over GPUs in terms of energy consumption, size and computing power.” the leading scientist, Dr.-Ing. Marcus Bednara explains. “Although Simplex algorithms are already widely used, the project posed the significant question of how much hardware/software co-design can achieve in terms of efficiency. We explored how much of the algorithm could be effectively offloaded to hardware to enhance performance and reduce energy consumption."

In the future, possible investigations lie in the adaptation of the current developed hardware accelerator to further operations in the Simplex Algorithm and enhancements of it. These would be the next steps towards higher acceleration and more realistic solver applications. It would have a further impact in the aforementioned edge applications but with advanced and faster results.