Further developments in the production processes of integrated circuits result in a progressive scaling of these structural sizes. The ever smaller component sizes create physical effects which can actually become a hindrance in the operation of the circuits. Process variations and parameter degradation are two significant examples of this. Whereas variations lead to differences in the operation of individual circuits right after production, parameter degradation will change circuit properties during the operating service life.
As a consequence, there is a danger of not meeting the specified characteristics of integrated circuitry during service life. Appropriate design methods can prevent this, but the software available is still rather patchy.
The MoRV (Modeling reliability under variability) project is a collaboration of seven European partners from industry and research. Their goal is to develop procedures and implement software which better take into account variations and aging in the circuit designs. The starting point is the physical level, where information is gathered from measurements and simulations. The project partners then derive models from this, reconstructing the combined effects of variations and aging. These models are the basis for an abstraction of the physical effects on the transistor level, the gating and the register-transfer level.
These steps make it possible to examine the impact of physical effects on the behavior of digital circuitry already in the design phase. The project expands on and combines existing initiatives so that a design process with associated software is developed alongside these models.
The Fraunhofer IIS/EAS contribution
The Fraunhofer IIS/EAS part in the MoRV project will be predominantly on the transistor level, at the junction where physics meets design. The main task at that level is to develop suitable models which reflect the changes in transistor properties caused by variations and degradation. Basis for the information about these changes are construction element simulations and measurements.
Compact simulation models will be part of the project, which then can be processed by simulation software for the analysis of circuit components. This is an essential step, in order to abstract the individual physical effects on the circuit properties. This allows the design engineer to see negative aspects of the physical effects on the circuit, to counteract them by means of targeted measures, and thereby ensure specification compliance over the entire service life of the unit.
The project is supported by the European Union within the Seventh Framework Programme ICT.