In the development of ASIC and SoC solutions, IPs and macros reduce the development time, design risk and costs. As an independent design house, we can offer our customers solutions tailored to their requirements. In addition, we enable fast and reliable integration of our IPs into the desired overall system in various semiconductor technologies from 350 nm down to 22 nm. Our customers benefit from a wide variety of silicon proven IPs which were created as part of our project expertise over many years. The Fraunhofer IIS portfolio ranges from mixed-signal IPs such as ADUs all the way to more complex circuit blocks, such as an ultra-low-power receiver with short latency.
We would be delighted to develop new macros for you or adapt existing IPs to your requirements.
Our service portfolio:
- Customized adaptation to improve the performance of your system
- Quick integration into overall system
- Development of IPs in desired technology
- High reliability thanks to silicon proven IPs
- Customer support