IP Cores and Macros Applications

List of IP Blocks offered by Fraunhofer IIS

Fraunhofer IIS offers high-quality hard and soft IP cores for analog and digital blocks in a variety of integrated technologies. We develop IPs that offer high reliability or adapt existing IPs to client requirements. One area that we have special expertise in is the fast and simple integration of IP blocks into your technology of choice. Here you can find a selection of our silicon proven IPs and macros.

ADC

Type

Resolution

Conversion Rate

Technology Node

ADC16b013kS180nm

cyclic

16 bit

13 kS/s

180 nm

ADC12b017kS180nm

cyclic

12 bit

17 kS/s

180 nm

ADC12b054kS180nm

cyclic

12 bit

54 kS/s

180 nm

ADC10b040MS180nm

pipeline

10 bit

40 MS/s

180 nm

ADC12b040MS180nm

pipeline

12 bit

40 MS/s

180 nm

ADC12b020MS350nm

pipeline

12 bit

20 MS/s

350 nm

ADC16b010kS350nm

Inc-ΔΣ

16 bit

10 kS/s

350 nm

ADC15b008kS180nm

ΔΣ

15 bit

8 kS/s

180 nm

ADC15b192kS180nm

ΔΣ

15 bit

192 kS/s

180 nm

ADC7b6GS055nm

folding

> 6 bit

4 to 6 GS/s

55 nm

         

DAC

TYPE

RESOLUTION

CONVERSION RATE

TECHNOLOGY NODE

DAC12b001MS180nm

Current

12 bit

1 MS/s

180 nm

DAC8b6GS055nm

Current

8 bit

4-6 GS/s

55 nm

         

RF

TYPE

IP DETAILS & FEATURES

KEY PARAMETERS

TECHNOLOGY NODE

RF_WakeUp_Rx

Receiver

ULP Receiver with low  latency

ISM Bands; 3 µA

130 nm

PLL160M40M180nm

PLL

Fully integrated 320 MHz/160 MHz PLL

Reference: 40 MHz

180 nm