Burnout: Designing power electronics that last longer

© Fraunhofer IIS
3D-Nano-CT-Analyse eines Mikrochips nach Versagen im Leistungs- und Temperatur-Belastungstest (Power Temperature Cycling). Die Messung zeigt eindrucksvoll die Schäden durch die lokale Erwärmung in den verschiedenen Ebenen der Metallisierung von den Leitungsschichten (Orange: Kupfer; Grau: Aluminium) bis zu den zylindrischen Durchkontaktierungen mit je nur 350 Nanometer Durchmesser (Dunkelblau: Wolfram).

X-ray imaging helps with early detection of design weaknesses in semiconductors

Technical components are getting smaller and smaller, yet their performance is constantly increasing. Semiconductor components in particular – and especially those designed for automotive applications – are at risk of being exposed to strong current pulses. So as to ensure maximum failure safety and longevity even for such highly sophisticated components, manufacturers put prototypes through extensive testing prior to market launch.

Power temperature cycling tests are used, for example, to find out whether the components will continue to function reliably even under exceptional conditions. In these tests, the components are subjected to periodic voltage spikes, which result in temperature rises of several hundred degrees Celsius in very strongly delimited local areas.

Because of the complexity of the components, which are frequently made up of several layers, it is often difficult after a failure to draw conclusions about the exact course of events or the affected individual components. Furthermore, several failures usually occur in the moment of duress, the exact sequence of which is difficult to reconstruct and interpret.

Researchers at the Fraunhofer Development Center for X-ray Technology EZRT at Fraunhofer IIS have been able to demonstrate, via a technology demonstration, that the use of high-resolution computed tomography in the error tracking of electronic components in pilot production can deliver additional insights in failure analysis. For the first time, three common failure phenomena were represented in 3D across all layers of the component. Even creeping defects, such as those caused by electromigration, can be pinpointed in this way.

This allows manufacturers to better identify and track design weaknesses and the expected damage sequence in advance. Detected weaknesses can be corrected before the component is ready for the production stage.

Technically, the demonstration is based on the ntCT system developed by Fraunhofer IIS, which is capable of visualizing tiny structures. The system is also able to use the full spectrum of the X-ray source in order to exploit higher photon energies even with maximum resolution. This is necessary for scanning chips with high metallization. With a resolution down to 150 nanometers, even the finest defects inside of circuits can be rendered visible.